Pearl Semiconductor

Digital Design Engineer

Job Code: EG_DDE_7/25

Location: Cairo, Egypt

Employment Type: Full Time

Responsibilities:

Design and implement complex digital circuits using Verilog/SystemVerilog.
Work on advanced timing IC designs and clock generation circuits.
Perform RTL-to-GDS implementation including timing closure and physical verification.
Develop comprehensive verification testbenches using UVM methodology.
Drive design optimization for performance, power, and area in advanced nodes.]

Qualifications:

Recent graduates or early-career professionals in electrical/computer engineering.
Strong foundation in digital design fundamentals and RTL design using Verilog/SystemVerilog.
Academic or internship experience with simulation tools and verification.
Basic understanding of verification methodologies (UVM/SystemVerilog preferred).
Familiarity with PnR concepts and design constraints.
Familiarity with Linux and scripting is a plus.
Strong debugging and problem-solving skills.

For interested applicants, please send your resume to hr.eg@pearlsemi.com mentioning the Job Code in the subject of the email.

Pearl Semiconductor offers a competitive financial package along with a medical insurance plan that covers the employee and his/her immediate family members.

Pearl Semiconductor is an Equal Opportunity Employer.

Contact Us

Pearl Semiconductor B.V.

Hoogoorddreef 15, Amsterdam, 1101 BA, Netherlands.

Phone

+31 20 522 2555

hq@pearlsemi.com

Pearl Semiconductor Egypt

3, Khaled Ibn Al-Waleed Street, Sheraton Heliopolis, Cairo 11361, Egypt.

Phone

+202 22690075

info@pearlsemi.com